1. Field of Invention
The present invention relates to an integrated circuit (IC) fabrication, and particularly to a polishing method of a semiconductor structure.
2. Description of Related Art
In a typical CMOS image sensor, photosensitive regions are disposed in a substrate, and a back-end-of-line (BEOL), a color filter array and micro-lenses are disposed on the same side of the substrate. Therefore, light passes not only the micro-lenses and the color filter array but also the BEOL to reach the photosensitive regions disposed in the substrate. Since metal of the BEOL is non-transparent and blocks the light, the amount of the light reaching the pixel array is very limited.
A backside illuminated (BSI) image sensor for detecting the amount of light from the backside of a substrate is thus developed. In the BSI image sensor, a BEOL is disposed on the front side of the substrate, and a color filter array and micro-lenses are disposed on the backside of the substrate. The light is illuminated on the backside of the substrate and only passes the micro-lenses and the color filter, without passing the BEOL, to reach the photosensitive regions. Light blocking of the BEOL is accordingly avoided, and thus, the sensitivity of each unit region is higher and the image quality is improved.
In a conventional backside illumination process, the backside of the substrate is typically thinned by a single chemical mechanical polishing (CMP) process after the BEOL is formed and before the color filter array is formed. However, such single CMP process may cause dishing in trench open areas and is incapable of removing particles effectively in pixel regions, thereby deteriorating the performance of the device.